ST STM32L4+ Series Reference Manual page 2007

RM0432
SDMMC_CK
SDMMC_CMD
SDMMC_Dn
To perform the normal boot procedure the following steps needed:
1. Reset the card.
2. if a boot acknowledgment is requested enable the BOOTACKEN and set the ACKTIME
and enable the ACKFAIL and ACKTIMEOUT interrupt.
3. enable the data reception by setting the DPSM in receive mode (DTDIR) and the
number of data bytes to be received in DATALENGTH.
4. Enable the DTIMEOUT, DATAEND, and CMDSENT interrupts for end of boot
command confirmation.
5. Select the normal boot operation mode in BOOTMODE, and enable boot in BOOTEN.
The boot procedure is started by enabling the CPSM with CPSMEN.This will cause:
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6. The incorrect reception of the boot acknowledgment can be detected with ACKFAIL
flag or ACKTIMEOUT flag when enabled.
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7. when all boot data has been received the DATAEND flag will occur.
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8. When last data has been received, read data from the FIFO until FIFO is empty
(RXFIFOE = 1) after which end of data DATAEND flag is generated.
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9. The boot procedure will be terminated by FW clearing BOOTEN, which will cause the
SDMMC_CMD line to go high. The CMDSENT flag is generated 56 cycles later to
indicate that a new command can be sent.
a)
10. The CMDSENT flag signals the end of the boot procedure and the card is ready to
receive a new command.
Secure digital input/output MultiMediaCard interface (SDMMC)
Figure 594. Normal boot mode operation
S 010 E
50 ms max.
1 s max.
74 cycles
the SDMMC_CMD to be driven low. (BOOTMODE = normal boot).
the ACK timeout to start.
DPSM to be enabled.
when an incorrect boot acknowledgment is received the ACKFAIL flag occurs.
when the boot acknowledgment is not received in time the ACKTIMEOUT flag
occurs.
when data CRC fails the DCRCFAIL flag is also generated.
when the data timeout occurs the DTIMEOUT flag is also generated.
SDMMC has completely received all data and the DPSM is disabled.
If the boot procedure is aborted by FW before all data has been received the
CPSM Abort signal will stop data reception and disable the DPSM which will
trigger an DABORT flag when enabled.
Block read
S E
+ CRC
RM0432 Rev 6
CMD1
Block read
S E
+ CRC
56 cycles min.
Boot completed
RESP
MSv40944V2
2007/2301
2041