ST STM32L4+ Series Reference Manual page 2010

Secure digital input/output MultiMediaCard interface (SDMMC)
The expected maximum busy time shall be set in the DATATIME register before sending the
command. When enabled, the DTIMEOUT flag will be set when after the R1b response
busy stays active longer then the programmed time.
To detect the SDMMC_D0 busy signaling when sending a Command with R1b response the
following procedure applies:
•
Enable CMDREND flag
• Send Command through CPSM.
•
On the CMDREND flag check the BUSYD0 register bit.
–
–
• On BUSYD0END flag signal busy released to the firmware.
•
On DTIMEOUT flag busy is active longer then programmed time.
54.6.7 Reset and card cycle power
Reset
Following reset the SDMMC will be in the reset state. In this state the SDMMC is disabled
and no command nor data can be transfered. The SDMMC_D[7:0], and SDMMC_CMD are
in HiZ and the SDMMC_CK is driven low.
Before moving to the power-on state the SDMMC shall be configured.
In the power-on state the SDMMC_CK clock is running. First 74 SDMMC_CK cycles will be
clocked after which the SDMMC is enabled and command and data can be transfered.
The SDMMC states are controlled by Firmware with the PWRCTL register bits according
Figure 597..
SDMMC disabled
Signals drive 0
SDMMC disabled
Card cycle power
To perform a card cycle power the following procedure applies:
2010/2301
If BUSYD0 signals not busy, signal busy release to the Firmware
If BUSYD0 signals busy, wait for BUSYD0END flag
Figure 597. SDMMC state control
PWRCTRL = 00
Power-cycle
Reset
PWRCTRL = 10
Reset
Signals HiZ
PWRCTRL = 11
Power-off
SDMMC disabled
Signals drive 1
Reset
RM0432 Rev 6
PWRCTRL = 11
Power-on
SDMMC disabled
Reset
Wait 74 cycles
SDMMC_CK > 74 cyles
Power-on
Reset
SDMMC enabled
RM0432
MSv40947V1