ST STM32L4+ Series Reference Manual page 2048

Controller area network (bxCAN)
This mode is provided for self-test functions. To be independent of external events, the CAN
Core ignores acknowledge errors (no dominant bit sampled in the acknowledge slot of a
data / remote frame) in Loop Back Mode. In this mode, the bxCAN performs an internal
feedback from its Tx output to its Rx input. The actual value of the CANRX input pin is
disregarded by the bxCAN. The transmitted messages can be monitored on the CANTX pin.
55.5.3 Loop back combined with silent mode
It is also possible to combine Loop Back mode and Silent mode by setting the LBKM and
SILM bits in the CAN_BTR register. This mode can be used for a "Hot Selftest", meaning the
bxCAN can be tested like in Loop Back mode but without affecting a running CAN system
connected to the CANTX and CANRX pins. In this mode, the CANRX pin is disconnected
from the bxCAN and the CANTX pin is held recessive.
55.6 Behavior in debug mode
When the microcontroller enters the debug mode (Cortex
continues to work normally or stops, depending on:
•
the DBG_CAN1_STOP bit for CAN1 or the DBG_CAN2_STOP bit for CAN2 in the
DBG module for the dual mode.
•
the DBF bit in CAN_MCR. For more details, refer to
status
55.7 bxCAN functional description
55.7.1 Transmission handling
In order to transmit a message, the application must select one empty transmit mailbox, set
up the identifier, the data length code (DLC) and the data before requesting the transmission
by setting the corresponding TXRQ bit in the CAN_TIxR register. Once the mailbox has left
empty state, the software no longer has write access to the mailbox registers. Immediately
after the TXRQ bit has been set, the mailbox enters pending state and waits to become the
highest priority mailbox, see Transmit Priority. As soon as the mailbox has the highest
priority it will be scheduled for transmission. The transmission of the message of the
2048/2301
Figure 606. bxCAN in combined mode
bxCAN
registers.
RM0432 Rev 6
Tx Rx
=1
CANTX CANRX
®
-M4 core halted), the bxCAN
Section 55.9.2: CAN control and
RM0432
MS30395V2