ST STM32L4+ Series Reference Manual page 2062

Controller area network (bxCAN)
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The transmit interrupt can be generated by the following events:
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The FIFO 0 interrupt can be generated by the following events:
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The FIFO 1 interrupt can be generated by the following events:
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The error and status change interrupt can be generated by the following events:
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55.9 CAN registers
The peripheral registers have to be accessed by words (32 bits).
55.9.1 Register access protection
Erroneous access to certain configuration registers can cause the hardware to temporarily
disturb the whole CAN network. Therefore the CAN_BTR register can be modified by
software only while the CAN hardware is in initialization mode.
Although the transmission of incorrect data will not cause problems at the CAN network
level, it can severely disturb the application. A transmit mailbox can be only modified by
software while it is in empty state, refer to
The filter values can be modified either deactivating the associated filter banks or by setting
the FINIT bit. Moreover, the modification of the filter configuration (scale, mode and FIFO
assignment) in CAN_FMxR, CAN_FSxR and CAN_FFAR registers can only be done when
the filter initialization mode is set (FINIT=1) in the CAN_FMR register.
55.9.2 CAN control and status registers
Refer to
CAN master control register (CAN_MCR)
Address offset: 0x00
Reset value: 0x0001 0002
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Transmit mailbox 0 becomes empty, RQCP0 bit in the CAN_TSR register set.
Transmit mailbox 1 becomes empty, RQCP1 bit in the CAN_TSR register set.
Transmit mailbox 2 becomes empty, RQCP2 bit in the CAN_TSR register set.
Reception of a new message, FMP0 bits in the CAN_RF0R register are not '00'.
FIFO0 full condition, FULL0 bit in the CAN_RF0R register set.
FIFO0 overrun condition, FOVR0 bit in the CAN_RF0R register set.
Reception of a new message, FMP1 bits in the CAN_RF1R register are not '00'.
FIFO1 full condition, FULL1 bit in the CAN_RF1R register set.
FIFO1 overrun condition, FOVR1 bit in the CAN_RF1R register set.
Error condition, for more details on error conditions refer to the CAN Error Status
register (CAN_ESR).
Wakeup condition, SOF monitored on the CAN Rx signal.
Entry into Sleep mode.
Section 1.2 for a list of abbreviations used in register descriptions.
Figure 607: Transmit mailbox
RM0432 Rev 6
RM0432
states.