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22.3.3
Timing of On-Chip Peripheral Modules
Tables 22.7 to 22.10 show the on-chip peripheral module timing. The only on-chip peripheral
modules that can operate in subclock operation (φ = 32.768 kHz) are the I/O ports, external
interrupts (NMI and IRQ0, 1, 2, 6, and 7), the watchdog timer, and the 8-bit timer (channels 0 and
1).
Table 22.7 Timing of On-Chip Peripheral Modules (1)
Conditions: V
= 3.0 V to 3.6 V, V
CC
4 MHz to maximum operating frequency, T
Item
I/O ports
Output data delay time
Input data setup time
Input data hold time
FRT
Timer output delay time
Timer input setup time
Timer clock input setup time
Timer clock
pulse width
TMR
Timer output delay time
Timer reset input setup time
Timer clock input setup time
Timer clock
pulse width
PWM
Pulse output delay time
SCI
Input clock
cycle
Input clock pulse width
Input clock rise time
Input clock fall time
B = 3.0 V to 5.5 V, V
CC
Symbol
t
PWD
t
PRS
t
PRH
t
FTOD
t
FTIS
t
FTCS
t
Single edge
FTCWH
t
Both edges
FTCWL
t
TMOD
t
TMRS
t
TMCS
t
Single edge
TMCWH
t
Both edges
TMCWL
t
PWOD
t
Asynchronous
Scyc
Synchronous
t
SCKW
t
SCKr
t
SCKf
= 0 V, φ = 32.768 kHz * ,
SS
= –20 to +75°C
a
Condition
10 MHz
Min.
Max.
—
100
50
—
50
—
—
100
50
—
50
—
1.5
—
2.5
—
—
100
50
—
50
—
1.5
—
2.5
—
—
100
4
—
6
—
0.4
0.6
—
1.5
—
1.5
Rev. 1.00, 05/04, page 523 of 544
Test
Unit
Conditions
ns
Figure 22.10
ns
Figure 22.11
Figure 22.12
t
cyc
ns
Figure 22.13
Figure 22.15
Figure 22.14
t
cyc
ns
Figure 22.16
t
Figure 22.17
cyc
t
Scyc
t
cyc
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