Input Capture Operation; Figure 10.12 Timing Of Input Capture Operation; Figure 10.13 Timing Of Input Capture Signal (Input Capture Signal Is Input During Ticrr And Ticrf Read) - Renesas H8S/2111B Hardware Manual

Bit single-chip microcomputer h8s family / h8s/2100 series
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10.8.3

Input Capture Operation

TMR_A has input capture registers (TICRR_A and TICRF_A). A narrow pulse width can be
measured with TICRR and TICRF, using a single capture. If the falling edge of TMRIA (TMR_A
input capture input signal) is detected after its rising edge has been detected, the value of TCNT_A
at that time is transferred to both TICRR and TICRF.
Input Capture Signal Input Timing: Figure 10.12 shows the timing of the input capture
operation.
φ
TMRIX
TMRIA
Input capture
signal
TCNT_X
TCNT_A
TICRR
TICRF
If the input capture signal is input while TICRR and TICRF are being read, the input capture
signal is delayed by one system clock (φ) cycle. Figure 10.13 shows the timing of this operation.
φ
TMRIX
TMRIA
Input capture
signal
(Input capture signal is input during TICRR and TICRF read)
n
M
m

Figure 10.12 Timing of Input Capture Operation

Figure 10.13 Timing of Input Capture Signal
n + 1
n
TICRR, TICRF read cycle
T
1
Rev. 1.00, 05/04, page 213 of 544
N
n
m
N
T
2
N + 1

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