Renesas H8S/2111B Hardware Manual page 234

Bit single-chip microcomputer h8s family / h8s/2100 series
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TCSR_B
Bit
Bit Name
7
CMFB
6
CMFA
5
OVF
4
ICIE
3
OS3
2
OS2
1
OS1
0
OS0
Notes: *
Only 0 can be written, for flag clearing.
Rev. 1.00, 05/04, page 200 of 544
Initial
Value
R/W
0
R/(W)*
0
R/(W)*
0
R/(W)*
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
Compare-Match Flag B
[Setting condition]
When the values of TCNT_B and TCORB_B match
[Clearing condition]
Read CMFB when CMFB = 1, then write 0 in CMFB
Compare-Match Flag A
[Setting condition]
When the values of TCNT_B and TCORA_B match
[Clearing condition]
Read CMFA when CMFA = 1, then write 0 in CMFA
Timer Overflow Flag
[Setting condition]
When TCNT_B overflows from H'FF to H'00
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
Input Capture Interrupt Enable
Enables or disables the ICF interrupt request (ICIA)
when the ICF bit in TCSR_A is set to 1.
0: ICF interrupt request (ICIA) is disabled
1: ICF interrupt request (ICIA) is enabled
Output Select 3, 2
These bits specify how the TMOB pin output level is to
be changed by compare-match B of TCORB_B and
TCNT_B.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
Output Select 1, 0
These bits specify how the TMOB pin output level is to
be changed by compare-match A of TCORA_B and
TCNT_B.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)

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