C Bus Extended Control Register (Icxr) - Renesas H8S/2111B Hardware Manual

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13.3.8 I

C Bus Extended Control Register (ICXR)

ICXR enables or disables the I
operation, and indicates the status of receive/transmit operations.
Bit Bit Name
7 STOPIM
6 HNDS
Rev. 1.00, 05/04, page 302 of 544
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C bus interface interrupt generation and continuous receive
Initial
Value R/W
0 R/W
0 R/W
Description
Stop Condition Interrupt Source Mask
Enables or disables the interrupt generation when the
stop condition is detected in slave mode.
0: Enables IRIC flag setting and interrupt generation
when the stop condition is detected (STOP = 1 or
ESTP = 1) in slave mode.
1: Disables IRIC flag setting and interrupt generation
when the stop condition is detected.
Handshake Receive Operation Select
Enables or disables continuous receive operation in
receive mode.
0: Enables continuous receive operation
1: Disables continuous receive operation
When the HNDS bit is cleared to 0, receive operation is
performed continuously after data has been received
successfully while ICDRF flag is 0.
When the HNDS bit is set to 1, SCL is fixed to the low
level and the next data transfer is disabled after data
has been received successfully while the ICDRF flag is
0. The bus line is released and next receive operation is
enabled by reading the receive data in ICDR.