Access To On-Chip Peripheral Modules - Renesas H8 Series Hardware Manual

2.6.2

Access to On-Chip Peripheral Modules

On-chip peripheral modules are accessed in two states or three states. The data bus width is 8 bits,
so access is by byte size only. This means that for accessing word data, two instructions must be
used.
Two-State Access to On-Chip Peripheral Modules: Figure 2.12 shows the operation timing in
the case of two-state access to an on-chip peripheral module.
φ or φ
SUB
Internal address bus
Internal read signal
Internal data bus
(read access)
Internal write signal
Internal data bus
(write access)
Figure 2.12 On-Chip Peripheral Module Access Cycle (2-State Access)
Bus cycle
T state
1
Address
Read data
Write data
Rev. 6.00 Sep 12, 2006 page 45 of 526
Section 2 CPU
T state
2
REJ09B0326-0600