Figure 5.6 Flowchart Of Procedure Up To Interrupt Acceptance In Interrupt Control Mode 1 - Renesas H8S/2111B Hardware Manual

Bit single-chip microcomputer h8s family / h8s/2100 series
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IRQ0
Figure 5.6 Flowchart of Procedure Up to Interrupt Acceptance
Rev. 1.00, 05/04, page 84 of 544
Program excution state
Interrupt generated?
Yes
An interrupt with interrupt
control level 1?
Yes
No
No
Yes
IRQ1
Yes
IFBFI3
Yes
I = 0
Yes
Yes
Save PC and CCR
Read vector address
Branch to interrupt handling routine
in Interrupt Control Mode 1
No
Yes
NMI
No
No
No
IRQ0
Yes
IRQ1
Yes
No
I = 0
Yes
No
UI = 0
I
1, UI
1
Hold pending
No
IFBFI3
Yes
No

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