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15.3
Register Descriptions
The LPC has the following registers.
• Host interface control register 0 (HICR0)
• Host interface control register 1 (HICR1)
• Host interface control register 2 (HICR2)
• Host interface control register 3 (HICR3)
• LPC channel 3 address registers (LADR3H, LADR3L)
• Input data register 1 (IDR1)
• Output data register 1 (ODR1)
• Status register 1 (STR1)
• Input data register 2 (IDR2)
• Output data register 2 (ODR2)
• Status register 2 (STR2)
• Input data register 3 (IDR3)
• Output data register 3 (ODR3)
• Status register 3 (STR3)
• Bidirectional data registers 0 to 15 (TWR0 to TWR15)
• SERIRQ control register 0 (SIRQCR0)
• SERIRQ control register 1 (SIRQCR1)
• Host interface select register (HISEL)
Rev. 1.00, 05/04, page 370 of 544
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