Renesas H8S/2111B Hardware Manual page 440

Bit single-chip microcomputer h8s family / h8s/2100 series
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Serial Interrupt Transfer Cycle
Frame
Count
Contents
0
Start
1
IRQ0
2
IRQ1
3
SMI
4
IRQ3
5
IRQ4
6
IRQ5
7
IRQ6
8
IRQ7
9
IRQ8
10
IRQ9
11
IRQ10
12
IRQ11
13
IRQ12
14
IRQ13
15
IRQ14
16
IRQ15
17
IOCHCK
18
Stop
There are two modes—continuous mode and quiet mode—for serialized interrupts. The mode
initiated in the next transfer cycle is selected by the stop frame of the serialized interrupt transfer
cycle that ended before that cycle.
In continuous mode, the host initiates host interrupt transfer cycles at regular intervals. In quiet
mode, the slave processor with interrupt sources requiring a request can also initiate an interrupt
transfer cycle, in addition to the host. In quiet mode, since the host does not necessarily initiate
interrupt transfer cycles, it is possible to suspend the clock (LCLK) supply and enter the power-
down state. In order for a slave to transfer an interrupt request in this case, a request to restart the
clock must first be issued to the host. For details see section 15.4.6, Host Interface Clock Start
Request (CLKRUN).
Rev. 1.00, 05/04, page 406 of 544
Drive
Number
Source
of States
Slave
6
Host
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Slave
3
Host
Undefined
Notes
In quiet mode only, slave drive possible in first
state, then next 3 states 0-driven by host
Drive possible in LPC channel 1
Drive possible in LPC channels 2 and 3
Drive possible in LPC channels 2 and 3
Drive possible in LPC channels 2 and 3
Drive possible in LPC channels 2 and 3
Drive possible in LPC channels 2 and 3
Drive possible in LPC channel 1
First, 1 or more idle states, then 2 or 3 states
0-driven by host
2 states: Quiet mode next
3 states: Continuous mode next

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