Figure 9.1 Block Diagram Of 16-Bit Free-Running Timer - Renesas H8S/2111B Hardware Manual

Figure 9.1 shows a block diagram of the FRT.
External clock
FTCI
Clock selector
FTOA
FTOB
FTIA
FTIB
FTIC
FTID
Control logic
[Legend]
OCRA, OCRB
OCRAR,OCRAF
OCRDM
FRC
ICRA to ICRD
TCSR
TIER
TCR
TOCR

Figure 9.1 Block Diagram of 16-Bit Free-Running Timer

Rev. 1.00, 05/04, page 158 of 544
Internal clock
φ/2
φ/8
φ/32
Clock
Compare-match A
Overflow
Clear
Compare-match B
Input capture
Comparator M
Compare-match M
ICIA
ICIB
ICIC
ICID Interrupt signal
OCIA
OCIB
FOVI
: Output compare register A, B (16-bit)
: Output compare register AR, AF (16-bit)
: Output compare register DM (16-bit)
: Free-running counter (16-bit)
: Input capture registers A to D (16-bit)
: Timer control/status register (8-bit)
: Timer interrupt enable register (8-bit)
: Timer control register (8-bit)
: Timer output compare control register (8-bit)
OCRAR/F
OCRA
Comparator A
FRC
Comparator B
OCRB
ICRA
ICRB
ICRC
ICRD
× 1
× 2
OCRDM
TCSR
TIER
TCR
TOCR
Internal data bus