Figure 12.9 Sample Serial Reception Flowchart (1); Table 12.9 Ssr Status Flags And Receive Data Handling - Renesas H8S/2111B Hardware Manual

Table 12.9 SSR Status Flags and Receive Data Handling

SSR Status Flag
RDRF* ORER
1 1
0 0
0 0
1 1
1 1
0 0
1 1
Note: * The RDRF flag retains the state it had before data reception.
Read ORER, PER, and
PER ∨ FER ∨ ORER = 1
Read RDRF flag in SSR
No
Read receive data in RDR, and
clear RDRF flag in SSR to 0
No
All data received?
Clear RE bit in SCR to 0
FER PER
0 0
1 0
0 1
1 0
0 1
1 1
1 1
Initialization
Start reception
FER flags in SSR
Yes
No
Error processing
(Continued on next page)
RDRF = 1
Yes
Yes
<End>

Figure 12.9 Sample Serial Reception Flowchart (1)

Receive Data
Lost
Transferred to RDR
Transferred to RDR
Lost
Lost
Transferred to RDR
Lost
[1] SCI initialization:
[1]
The RxD pin is automatically designated
as the receive data input pin.
[2] [3] Receive error processing and break
detection:
If a receive error occurs, read the ORER,
[2]
PER, and FER flags in SSR to identify the
error. After performing the appropriate
error processing, ensure that the ORER,
PER, and FER flags are all cleared to 0.
[3]
Reception cannot be resumed if any of
these flags are set to 1. In the case of a
framing error, a break can be detected by
reading the value of the input port
corresponding to the RxD pin.
[4]
[4] SCI status check and receive data read:
Read SSR and check that RDRF = 1, then
read the receive data in RDR and clear the
RDRF flag to 0. Transition of the RDRF
flag from 0 to 1 can also be identified by an
RXI interrupt.
[5] Serial reception continuation procedure:
To continue serial reception, before the
stop bit for the current frame is received,
[5] read the RDRF flag, read RDR, and clear
the RDRF flag to 0.
[Legend]
∨ : Logical OR
Receive Error Type
Overrun error
Framing error
Parity error
Overrun error + framing error
Overrun error + parity error
Framing error + parity error
Overrun error + framing error
+ parity error
Rev. 1.00, 05/04, page 257 of 544