Table 8.2
Internal Clock Selection
PWSL
PWCKE
PWCKS
0
—
1
0
1
Note:
*
The program development tool (emulator) does not support this function.
Resolution, PWM Conversion Period, and Carrier Frequency when φ = 10 MHz
Table 8.3
Internal Clock
Frequency
φ
φ/2
φ/4
φ/8
φ/16
φ/256*
φ/512*
φ/1024*
φ/4096*
Note:
*
The program development tool (emulator) does not support this function.
Rev. 1.00, 05/04, page 150 of 544
PCSR
PWCKC PWCKB PWCKA
—
—
—
—
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Resolution
100 ns
200 ns
400 ns
800 ns
1.6 µs
25.6 µs
51.2 µs
102 µs
410 µs
Description
—
Clock input is disabled
φ (system clock) is selected
—
φ/2 is selected
0
φ/4 is selected
1
φ/8 is selected
0
φ/16 is selected
1
φ/256 is selected*
0
φ/512 is selected*
1
φ/1024 is selected*
0
φ/4096 is selected*
1
PWM
Conversion Period
25.6 µs
51.2 µs
102 µs
205 µs
410 µs
6.55 ms
13.1 ms
26.2 ms
105 ms
(Initial value)
Carrier Frequency
625 kHz
312.5 kHz
156.3 kHz
78.1 kHz
39.1 kHz
2.4 kHz
1.2 kHz
610 kHz
152 kHz