Timer Ab Control Register (Tcrab) - Renesas H8S/2111B Hardware Manual

10.3.12 Timer AB Control Register (TCRAB)

TCRAB selects the internal clock or controls the input capture function in the TMR_A and
TMR_B.
Bit Bit Name

7, 6
5 CKSA
4 CKSB
3 ICST
2 to 0 —
Note: * The program development tool (emulator) does not support TCRXY.
Initial
Value R/W
All 0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Description
Reserved
The initial value should not be modified.
TMR_A Clock Select
For details about selection, see the clock conditions in
table 10.3.
TMR_B Clock Select
For details about selection, see the clock conditions in
table 10.3.
Input Capture Start Bit
TMR_A has input capture registers (TICRR_A and
TICRF_A). TICRR and TICRF can measure the width
of a pulse by means of a single capture operation
under the control of the ICST bit. When a rising edge
followed by a falling edge is detected on TMRIA after
the ICST bit is set to 1, the contents of TCNT at those
points are captured into TICRR and TICRF,
respectively, and the ICST bit is cleared to 0.
[Clearing condition]
When a rising edge followed by a falling edge is
detected on TMRIA
[Setting condition]
When 1 is written in ICST after reading ICST = 0
Reserved
The initial value should not be modified.
Rev. 1.00, 05/04, page 205 of 544