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7.9.3
Pin Functions
• P97/SDA0
The pin function is switched as shown below according to the combination of the ICE bit in
ICCR of IIC_0, the IIC0AS and the IIC0BS bits in PGCTL*, and the P97DDR bit.
P97ICE = ICE
•
(IIC0AS+IIC0BS)*
P97ICE*
P97DDR
Pin Function
Note: When this pin is set as the P97 output pin, it is an NMOS push-pull output. SDA0 is an
NMOS open-drain output, and has direct bus drive capability.
The program development tool (emulator) does not support the function of PGCTL.
*
Thus P97ICE is treated as ICE.
• P96/φ/EXCL
The pin function is switched as shown below according to the combination of the EXCLE bit
in LPWRCR and the P96DDR bit.
P96DDR
EXCLE
Pin Function
Note: *
When this pin is used as the EXCL input pin, P96DDR should be cleared to 0.
• P95
The pin function is switched as shown below according to the state of the P95DDR bit.
P95DDR
Pin Function
• P94
The pin function is switched as shown below according to the state of the P94DDR bit.
P94DDR
Pin Function
• P93
The pin function is switched as shown below according to the state of the P93DDR bit.
P93DDR
Pin Function
0
0
P97 input pin
P97 output pin
0
0
P96 input pin
EXCL input pin
0
P95 input pin
0
P94 input pin
0
P93 input pin
1
1
Rev. 1.00, 05/04, page 123 of 544
1
—
SDA0 I/O pin
1
0
φ output pin
1
P95 output pin
1
P94 output pin
1
P93 output pin
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