Effective Address Calculation; Table 2.13 Effective Address Calculation (1) - Renesas H8S/2111B Hardware Manual

Bit single-chip microcomputer h8s family / h8s/2100 series
Table of Contents

Advertisement

2.7.9

Effective Address Calculation

Table 2.13 indicates how effective addresses are calculated in each addressing mode. In normal
mode, the upper 8 bits of the effective address are ignored in order to generate a 16-bit address.

Table 2.13 Effective Address Calculation (1)

Addressing Mode and Instruction Format
Register direct (Rn)
Register indirect (@ERn)
Register indirect with post-increment or
pre-decrement
• Register indirect with post-increment @ERn+
• Register indirect with pre-decrement @-ERn
Rev. 1.00, 05/04, page 44 of 544
Effective Address Calculation
General register contents
General register contents
Sign extension
General register contents
1, 2, or 4
General register contents
1, 2, or 4
Operand Size
Byte
Word
Longword
Effective Address (EA)
Operand is general register contents.

Advertisement

Table of Contents
loading

This manual is also suitable for:

Hd64f2111b

Table of Contents