Address Break; Features; Block Diagram; Figure 5.8 Address Break Block Diagram - Renesas H8S/2111B Hardware Manual

5.7

Address Break

5.7.1

Features

This LSI can determine the specific address prefetch by the CPU to generate an address break
interrupt by setting ABRKCR and BAR. If an address break interrupt is generated, the address
break interrupt exception handling is performed.
With this function, the execution start point of a program containing a bug is detected and
execution is branched to the correcting program.
5.7.2

Block Diagram

Figure 5.8 shows a block diagram of the address break.
Internal address
Prefetch signal
(internal signal)
BAR
Match
signal
Comparator

Figure 5.8 Address Break Block Diagram

ABRKCR
Control
Address break
logic
interrupt request
Rev. 1.00, 05/04, page 87 of 544