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• PG3, PG2, PG1, PG0
The pin function is switched as shown below according to the state of the PGnDDR bit.
PGnDDR
Pin Function
[Legend]
n = 3 to 0
7.14.5
Port G Nch-OD Control Register (PGNOCR)
PGNOCR specifies the output driver type for pins on port G which are configured as outputs on a
bit-by-bit basis.
Bit
Bit Name
7
PG7NOCR 0
6
PG6NOCR 0
5
PG5NOCR 0
4
PG4NOCR 0
3
PG3NOCR 0
2
PG2NOCR 0
1
PG1NOCR 0
0
PG0NOCR 0
7.14.6
Pin Functions
DDR
NOCR
ODR
V
-side N-ch. driver
ss
V
-side N-ch. driver
cc
Pin function
Note:
*
Except when set as IIC I/O pin.
0
PGn input pin
Initial
Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
—
0
OFF
OFF
Input pin
Description
0: NMOS push-pull (Vcc-side n-channel driver enabled)
1: Vss-side N-channel open drain (Vcc-side N-channel
driver disabled)
1
0
ON
OFF
1
PGn output pin
1
0
1
0
OFF
ON
ON
Output pin*
Rev. 1.00, 05/04, page 145 of 544
1
1
OFF
OFF
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