Figure 2.13 State Transitions - Renesas H8S/2111B Hardware Manual

Bit single-chip microcomputer h8s family / h8s/2100 series
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End of
exception
handling
Exception-handling state
RES = high
1
Reset state*
From any state except hardware standby mode, a transition to the reset state occurs whenever RES
Notes: 1.
goes low. A transition can also be made to the reset state when the watchdog timer overflows.
From any state, a transition to hardware standby mode occurs when STBY goes low.
2.
3.
The power-down state also includes watch mode, subactive mode, subsleep mode, etc. For details,
refer to section 20, Power-Down Modes.
Program execution
state
SLEEP
instruction
with
LSON = 0,
PSS = 0,
SSBY = 1
Request for
exception
handling
Interrupt
request
External interrupt
request
STBY = high, RES = low

Figure 2.13 State Transitions

SLEEP
instruction
with
LSON = 0,
SSBY = 0
Sleep mode
Software standby mode
2
Hardware standby mode*
3
Power-down state*
Rev. 1.00, 05/04, page 47 of 544

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