Port A; Port A Data Direction Register (Paddr); Port A Output Data Register (Paodr) - Renesas H8S/2111B Hardware Manual

7.10

Port A

Port A is an 8-bit I/O port. Port A pins also function as keyboard buffer controller I/O pins, and
key-sense interrupt input pins. Port A input/output operates by VccB power independent from the
Vcc power. Up to 5 V can be applied to port A pins if VccB power is 5 V. Port A has the
following registers. PADDR and PAPIN have the same address.

• Port A data direction register (PADDR)

• Port A output data register (PAODR)

• Port A input data register (PAPIN)
7.10.1 Port A Data Direction Register (PADDR)
PADDR specifies input or output for the pins of port A on a bit-by-bit basis.
Bit Bit Name
7 PA7DDR
6 PA6DDR
5 PA5DDR
4 PA4DDR
3 PA3DDR
2 PA2DDR
1 PA1DDR
0 PA0DDR
7.10.2 Port A Output Data Register (PAODR)
PAODR stores output data for port A.
Bit Bit Name
7 PA7ODR
6 PA6ODR
5 PA5ODR
4 PA4ODR
3 PA3ODR
2 PA2ODR
1 PA1ODR
0 PA0ODR
Initial
R/W
Value
0 W
0 W
0 W
0 W
0 W
0 W
0 W
0 W
Initial
Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Description
The corresponding port A pins are output ports when
PADDR bits are set to 1, and input ports when
cleared to 0.
PA7 to PA2 pins are used as the keyboard buffer
controller I/O pins by setting the KBIOE bit to 1, while
the I/O direction according to PA7DDR to PA2DDR is
ignored.
PADDR has the same address as PAPIN, if read, port
A state is returned.
Description
PAODR can always be read or written to, regardless
of the contents of PADDR.
Rev. 1.00, 05/04, page 125 of 544