Renesas H8S/2111B Hardware Manual page 28

Section 16 A/D Converter
Figure 16.1 Block Diagram of A/D Converter ........................................................................... 414
Figure 16.2 Example of A/D Converter Operation
(Scan Mode, Channels AN0 to AN2 Selected)....................................................... 420
Figure 16.3 A/D Conversion Timing.......................................................................................... 421
Figure 16.4 External Trigger Input Timing ................................................................................ 422
Figure 16.5 A/D Conversion Accuracy Definitions ................................................................... 424
Figure 16.6 A/D Conversion Accuracy Definitions ................................................................... 424
Figure 16.7 Example of Analog Input Circuit ............................................................................ 425
Figure 16.8 Example of Analog Input Protection Circuit........................................................... 427
Figure 16.9 Equivalent Circuit of Analog Input Pin................................................................... 427
Section 18 ROM
Figure 18.1 Block Diagram of Flash Memory............................................................................ 432
Figure 18.2 Flash Memory State Transitions.............................................................................. 433
Figure 18.3 Boot Mode............................................................................................................... 434
Figure 18.4 User Program Mode (Example) .............................................................................. 435
Figure 18.5 Flash Memory Block Configuration........................................................................ 436
Figure 18.6 On-Chip RAM Area in Boot Mode ......................................................................... 444
Figure 18.7 ID Code Area .......................................................................................................... 444
Figure 18.8 Programming/Erasing Flowchart Example in User Program Mode ........................ 445
Figure 18.9 Program/Program-Verify Flowchart ....................................................................... 447
Figure 18.10 Erase/Erase-Verify Flowchart ............................................................................... 449
Figure 18.11 Memory Map in Programmer Mode...................................................................... 452
Section 19 Clock Pulse Generator
Figure 19.1 Block Diagram of Clock Pulse Generator ............................................................... 455
Figure 19.2 Typical Connection to Crystal Resonator................................................................ 456
Figure 19.3 Equivalent Circuit of Crystal Resonator.................................................................. 456
Figure 19.4 Example of External Clock Input ............................................................................ 457
Figure 19.5 External Clock Input Timing................................................................................... 458
Figure 19.6 Timing of External Clock Output Stabilization Delay Time................................... 459
Figure 19.7 Subclock Input Timing............................................................................................ 460
Figure 19.8 Note on Board Design of Oscillator Circuit Section ............................................... 461
Section 20 Power-Down Modes
Figure 20.1 Mode Transition Diagram ....................................................................................... 468
Figure 20.2 Medium-Speed Mode Timing ................................................................................. 470
Figure 20.3 Application Example in Software Standby Mode ................................................... 472
Figure 20.4 Hardware Standby Mode Timing ............................................................................ 473
Section 22 Electrical Characteristics
Figure 22.1 Darlington Pair Drive Circuit (Example) ................................................................ 518
Figure 22.2 LED Drive Circuit (Example) ................................................................................. 519
Figure 22.3 Output Load Circuit ................................................................................................ 520
Rev. 1.00, 05/04, page xxviii of xxxiv