Pin Functions - Renesas H8S/2111B Hardware Manual

7.5.3

Pin Functions

• P52/ExSCK1*/SCL0
The pin function is switched as shown below according to the combination of the C/A bit in
SMR of SCI_1, the CKE0 and CKE1 bits in SCR, the SPS1 bit*
of IIC_0, the IIC0AS and the IIC0BS bits in PGCTL*
P52ICE = ICE
• (IIC0AS+IIC0BS)*
1
SPS1*
2
P52ICE*
CKE1 —
C/A —
CKE0 —
P52DDR 0
Pin Function
P52
input pin
Note: 1. When this pin is used as the SCL0 I/O pin by setting 1 to the SPS1 bit of SPSR, the bits
CKE1 and CKE0 in SCR of SCI_1 and the C/A bit in SMR must all be cleared to 0.
SCL0 is an NMOS open-drain output. When set as the P52 output pin or ExSCK1
output pin, this pin is an NMOS push-pull output.
2. The program development tool (emulator) does not support the function of PGCTL.
Thus P52ICE is treated as ICE.
• P51/ExRxD1
The pin function is switched as shown below according to the combination of the RE bit in
SCR of SCI_1, the SPS1 bit* in SPSR, and the P51DDR bit.
SPS1*
RE
P51DDR
Pin Function
Note: * The program development tool (emulator) does not support this function.
2
0
0 1
— —
— —
— —
1 —
P52 SCL0
output pin I/O pin
0
—
0
P51 input pin P51 output pin
2
, and the P52DDR bit.
0
0
0
0 1 —
P52 P52 ExSCK1*
input pin output pin output pin
1
P51 input
pin
1
in SPSR, the ICE bit in ICCR
1
0
1
1 —
1 — —
— —
1 1
ExSCK1* ExSCK1*
output pin input pin
1
0
0 1
P51 output
pin
Rev. 1.00, 05/04, page 111 of 544
1
0
0
0
—
1
SCL0
I/O pin
1
—
ExRxD1
input pin*