3.4
Address Map
Figures 3.1 and 3.2 show the address map in each operating mode.
H'000000
H'00FFFF
H'01FFFF
H'FFE080
H'FFE880
H'FFEFFF
H'FFF800
H'FFFE4F
H'FFFE50
H'FFFEFF
H'FFFF00
H'FFFF7F
H'FFFF80
H'FFFFFF
Mode 2 (EXPE = 0)
Advanced mode
Single-chip mode
On-chip ROM
Reserved area
Reserved area
On-chip RAM
Internal I/O
registers 3
Internal I/O
registers 2
On-chip RAM
(128 bytes)
Internal I/O
registers 1
Figure 3.1 Address Map for H8S/2111B-B
Mode 3 (EXPE = 0)
Normal mode
Single-chip mode
H'0000
On-chip ROM
H'DFFF
H'E080
Reserved area
H'E880
On-chip RAM
H'EFFF
H'F800
Internal I/O
registers 3
H'FE4F
H'FE50
Internal I/O
H'FEFF
registers 2
H'FF00
On-chip RAM
(128 bytes)
H'FF7F
Internal I/O
H'FF80
registers 1
H'FFFF
Rev. 1.00, 05/04, page 57 of 544