Table of Contents
Advertisement
Register Name
Output control register AFL
Input capture register CH
Output compare register DMH
Input capture register CL
Output compare register DML
Input capture register DH
Input capture register DL
Timer control/status register_0
Timer counter_0
Timer counter_0
Port A output data register
Port A input data register
Port A data direction register
Port 1 pull-up MOS control register
Port 2 pull-up MOS control register
Port 3 pull-up MOS control register
Port 1 data direction register
Port 2 data direction register
Port 1 data register
Port 2 data register
Port 3 data direction register
Port 4 data direction register
Port 3 data register
Port 4 data register
Port 5 data direction register
Port 6 data direction register
Port 5 data register
Port 6 data register
Port B output data register
Port B input data register
Number
Abbreviation
of Bits
OCRAFL
8
ICRCH
8
OCRDMH
8
ICRCL
8
OCRDML
8
ICRDH
8
ICRDL
8
TCSR_0
8
TCNT_0
8
TCNT_0
8
PAODR
8
PAPIN
8
PADDR
8
P1PCR
8
P2PCR
8
P3PCR
8
P1DDR
8
P2DDR
8
P1DR
8
P2DR
8
P3DDR
8
P4DDR
8
P3DR
8
P4DR
8
P5DDR
8
P6DDR
8
P5DR
8
P6DR
8
PBODR
8
PBPIN
8
Address
Module
H'FF9B
FRT
H'FF9C
FRT
H'FF9C
FRT
H'FF9D
FRT
H'FF9D
FRT
H'FF9E
FRT
H'FF9F
FRT
H'FFA8
WDT_0
H'FFA8
WDT_0
(write)
H'FFA9
WDT_0
(read)
H'FFAA
PORT
H'FFAB
PORT
H'FFAB
PORT
H'FFAC
PORT
H'FFAD
PORT
H'FFAE
PORT
H'FFB0
PORT
H'FFB1
PORT
H'FFB2
PORT
H'FFB3
PORT
H'FFB4
PORT
H'FFB5
PORT
H'FFB6
PORT
H'FFB7
PORT
H'FFB8
PORT
H'FFB9
PORT
H'FFBA
PORT
H'FFBB
PORT
H'FFBC
PORT
H'FFBD
PORT
(read)
Rev. 1.00, 05/04, page 485 of 544
Number
Data
of
Bus
Access
Width
States
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
8
2
Advertisement
Table of Contents
