Read Access To Hpi With Autoincrement: Hwob - Texas Instruments TMS320C6201 Reference Manual

Table 7–12. Read Access to HPI With Autoincrement: HWOB = 0
Event HD
Host reads ????
1st halfword
Data not
ready
Host reads 789A
1st halfword
Data ready
Host reads BCDE
2nd halfword
Prefetch ????
Data not
ready
Prefetch ????
Data ready
Note: A ? in this table indicates the value is unknown.
7.4.4 Host Data Write Access Without Autoincrement
Value During Access
HBE[1:0] HR/W HCNTL[1:0]
xx 1 10
xx 1 10
xx 1 10
xx x xx
xx x xx
During a write access to the HPI, the first halfword portion of HPID (the least
significant halfword or most significant halfword, as selected by HWOB) is over-
written by the data coming from the host, and the first HBE[1:0] pair is latched
while the HHWIL pin is low. The second halfword portion of HPID is overwritten
by the data coming from the host, and the second HBE[1:0] pair is latched on the
rising edge of HSTROBE while the HHWIL pin is high. At the end of this write ac-
cess (with the second rising edge of HSTROBE), HPID is transferred as a 32-bit
word to the address specified by HPIA with the four related byte enables.
Table 7–13 and Table 7–14 summarize an HPID write access with HWOB = 1
and HWOB = 0, respectively. The host writes 5566h to the 16 LSBs of location
80001234h, which is already pointed to by HPIA. This location is assumed to
start with the value 0. The HPI delays the host until any previous transfers are
completed by setting HRDY high. If there are no pending writes waiting in HPID,
then write accesses normally proceed without a not-ready time. The HBE[1:0]
pair is enabled only for the transfer of the 16 LSBs.
HRDY HHWIL HPIC
1 0 00000000
0 0 00080008
0 1 00080008
1 x 00000000
0 x 00080008
Host-Port Interface
Host Access Sequences
Value After Access
HPIA HPID
80001234 ????????
80001234 789ABCDE
80001234 789ABCDE
80001238 789ABCDE
80001238 87654321
7-23