Texas Instruments TMS320C6201 Reference Manual page 404

SPI Protocol: CLKSTP
11.7.3 McBSP Initialization for SPI Mode
11-86
The operation of the serial port during device reset, transmitter reset, and
receiver reset is described in section 11.3.1. For McBSP operation as a master
or a slave in SPI mode, you must follow these steps for proper initialization:
1) Set XRST = RRST = 0 in SPCR.
2) Program the necessary McBSP configuration registers (and not the data
registers) listed in Table 11–2 as required when the serial port is in the
reset state (XRST = RRST = 0) except for CLKSTP, which should be dis-
abled. Program CLKSTP to 0Xb if CLKSTP is not disabled.
3) Set GRST = 1 in SPCR to get the sample rate generator out of reset.
4) Wait two bit clocks for the McBSP to reinitialize.
5) Write the desired value into the CLKSTP field in the SPCR. Table 11–21
shows the various CLKSTP modes.
6) Depending on whether the CPU or DMA services the McBSP, either (a) or
(b) should be followed.
a) This step should be performed if the CPU is used to service the
McBSP. Set /XRST = /RRST = 1 to enable the serial port. Note that
the value written to the SPCR at this time should have only the reset
bits changed to 1 and the remaining bit–fields should have the same
values as in Step 2 and 4 above.
b) If DMA is used to perform data transfers, the DMA should be initialized
first with the appropriate read/write syncs and the start bit set to run.
The DMA waits for the synchronization events to occur. Now, pull the
McBSP out of reset by setting XRST = RRST = 1.
7) Wait two bit clocks for the receiver and transmitter to become active.