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Expansion Bus Host Port Operation
8-32
5) Data phase: During this phase, data (D1) is presented by the DSP and the
external device is ready to accept the data, which is indicated by XRDY
being active.
6) The DSP presents next data (D2). The external device indicates not ready
condition, which is indicated by XRDY being inactive.
7) The 'C6202 is holding data D2 on the expansion bus since the external
device is still not ready.
8) External device finally accepts the D2.
9) The DSP presents next data (D3). The external device is ready to take D3.
10) The DSP presents next data (D4). The external device is ready to take D4.
11) The DSP presents next data (D5). The external device is ready to take D5.
12) The DSP is not ready to present D6 and asserts XWAIT. The external de-
vice is waiting for the DSP to present new data.
13) Same as 12.
14) Same as 12.
15) The DSP presents next data (D6), and negates XWAIT. The external de-
vice is ready to take D6.
16) The DSP presents next data (D7). The external device is ready to take D7.
17) The DSP presents the last data (D8), and asserts XBLAST. The external
device is ready to take D8.
18) Recovery cycle
19) The DSP removes the bus request (XHOLD), and is turns off the outputs.
To prevent contention on the expansion bus, one recovery state between the
last data transfer and next address cycle is inserted.
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