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Connections Between the Emulator and the Target System
15.7.2 Using a Target-System Clock
Figure 15–4. Target-System-Generated Test Clock
15-10
Figure 15–4 shows an application with the system test clock generated in the
target system. In this application, the TCK signal is left unconnected.
JTAG Device
EMU0
EMU1
TRST
TMS
TDI
TDO
TCK
System Test Clock
Note:
When the TMS/TDI lines are buffered, pullup resistors should be used to hold the buffer
inputs at a known level when the emulator cable is not connected.
There are two benefits to having the target system generate the test clock:
The emulator provides only a single 10.368-MHz test clock. If you allow
the target system to generate your test clock, you can set the frequency
to match your system requirements.
In some cases, you may have other devices in your system that require
a test clock when the emulator is not connected. The system test clock
also serves this purpose.
Greater Than
6 Inches
V CC
Emulator Header
13
EMU0
14
EMU1
2
TRST
1
TMS
3
TDI
7
TDO
11
NC
TCK
9
TCK_RET
V CC
5
PD
4
GND
6
GND
8
GND
10
GND
12
GND
GND
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