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Additional Power-Saving Modes for the TMS320C6202
14.3 Additional Power-Saving Modes for the TMS320C6202
Table 14–3. TMS320C6202 Peripheral Power-Down Memory-Mapped Register
Figure 14–3. Peripheral Power-Down Control Fields for the TMS320C6202
31
5
Reserved
PDMCSP2
R,+0
14-6
In addition to the power down modes common to all of the C6x devices, the
'C6202 has the ability to turn off clocks to individual peripherals on the device.
This feature allows the user to selectively turn off peripherals which are not be-
ing used for a specific application and not pay the extra price in power con-
sumption for unused peripherals.
This method can have significant savings in power consumption. In a device
which is as highly integrated as the C6000 series of DSPs a significant amount
of power can be consumed in a reset or no activity state just due to the internal
clock distribution. By selectively turning off unused portions of the device, the
effects can be minimized.
Table 14–3 shows the peripheral power down register address location, and
Figure 14–3 shows the register fields.
Byte Address
019C 0200h
4
3
PDMCSP1
RW,+1
RW,+1
Field
Peripheral Power-Down Control
2
PDMCSP0
RW,+1
1
0
PDEMIF
PDDMA
RW,+1
RW,+1
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