Figure 15–9. EMU0/1 Configuration
XCNT_ENABLE
EMU0/1-IN
PAL
EMU0/1-OUT
To Emulator EMU0
TCK
Notes:
1) The low time on EMUx-IN should be at least one TCK cycle and less than 10 s. Software will set the EMUx-OUT
pin to a high state.
2) To enable the open-collector driver and pullup resistor on EMU1 to provide rising/falling edges of less than 25 ns,
the modification shown in this figure is suggested. Rising edges slower than 25 ns can cause the emulator to detect
false edges during the RUNB command or when the external counter selected from the debugger analysis menu
is used.
Backplane
Pullup
Resistor
These seven important points apply to the circuitry shown in Figure 15–9 and
Figure 15–10 , and the timing shown in Figure 15–11:
Open-collector drivers isolate each board. The EMU0/1 pins are tied to-
gether on each board.
At the board edge, the EMU0/1 signals are split to provide IN/OUT. This
is required to prevent the open-collector drivers from acting as a latch that
can be set only once.
The EMU0/1 signals are bused down the backplane. Pullup resistors are
installed as required.
The bused EMU0/1 signals go into a PAL
generate a low pulse on the EMU0/1-IN signal when a low level is detected
Emulation Design Considerations
Pullup Resistor
Open
Collector
Drivers
Device
1
Pullup Resistor
Open
Collector
Drivers
Device
1
R
Designing for JTAG Emulation
Target Board 1
EMU0/1
Device
. . .
n
Target Board m
EMU0/1
Device
. . .
n
device, whose function is to
15-19