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TMS320C80 to TMS320C82 Software Compatibility User’s Guide SPRU154 November 1995 Printed on Recycled Paper...
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IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current.
Preface Read This First About This Manual The TMS320C80 and the TMS320C82 are the first two members of the ’C8x family of high-performance DSP devices. This guide explains how to port software developed for one of these devices to the other. It also presents a set of software compatibility guide- lines for developing software that will run on either device.
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SPRU113) describes the ’C8x features, development environment, architecture, memory organization, and communication network (the crossbar). TMS320C80 C Source Debugger User’s Guide (literature number SPRU107) describes the ’C8x master processor and parallel processor C source debuggers. This manual provides information about the features and operation of the debuggers and the parallel debug manager;...
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Related Documentation From Texas Instruments / If You Need Assistance TMS320C80 Parallel Processor User’s Guide (literature num- ber SPRU110) describes the ’C8x parallel processor (PP). This manual provides information about the PP features, ar- chitecture, operation, and assembly language instruction set.
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TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
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3–8 Sample PP C Program With an Assembly Language Function ..3-17 3–9 Assembly Language Function to Calculate the Dot Product of ..3-18 Two Vectors TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
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Running Title—Attribute Reference Contents 4 Comparison of the ’C80 and ’C82 ........Describes differences that affect compatibility in the ’C80 and ’C82.
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........Provides the memory maps of the ’C80 and ’C82. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Chapter 1 Comparison of the ’C80 and ’C82 There are several differences between the ’C80 and the ’C82. As a programmer, you must be aware of these differences to effec- tively write code that runs on both the ’C80 and the ’C82. This chapter describes important differences to prepare you for the software-related discussions in Chapter 2 and Chapter 3.
Parallel Processor Differences 1.2 Parallel Processor Differences The most important difference related to the parallel processors (PPs) is the number of PPs per chip: the ’C80 has four PPs and the ’C82 has two. Since the ’C82 has two PPs, software written to execute on both the ’C80 and ’C82 must not require more than two PPs.
1.3.2 RAM Bank Configuration Mechanisms The special RAM bank configuration pins on the ’C80 and the configuration cache on the ’C82 are hardware features that have a negligible impact on software. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Video Controller Differences 1.4 Video Controller Differences The ’C80 has an on-chip video controller, but the ’C82 does not. If the chips are to be used in video applications, the portion of your software that sets up the video timing registers needs to be written so that an external video controller can be used with the ’C82.
’C82’s PP0 data RAM 1 and PP1 data RAM 1 is unpopulated on the ’C80. The memory locations occu- pied by the ’C80’s data RAMs for PP2 and PP3 are unpopulated on the ’C82. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
In the ’C80, the MP parameter RAM can be accessed only by the MP and TC. However, in the ’C82, the MP parameter RAM can be accessed by the MP, TC, and PPs. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Memory Differences Figure 1–2. ’C80 and ’C82 Parameter RAMs in the Memory Map Address (Hex) ’C80 Block ’C82 Block 0100 0000 PP0 parameter RAM PP0 parameter RAM 0100 07FF É É É É É É É É É É 0100 0800 (4096 bytes) É...
Memory Differences Figure 1–4 shows a typical PP parameter RAM in the ’C80 and ’C82. In the figure, the # sign in each address corresponds to the PP number. The memory maps of the first 512 bytes of the PP parameter RAM are identical in the ’C80 and ’C82.
(stack pointer points here after reset) IPE value from before reset 0100 #7F4 0100 #FF4 IPA value from before reset 0100 #7F8 0100 #FF8 SP value from before reset 0100 #7FC 0100 #FFC 1-12 TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Memory Differences 1.5.3 Caches Generally, cache operation is completely transparent; in most cases you need not worry about cache differences between the ’C80 and the ’C82. Cache memory is generally not directly accessed by application software, so the locations of the caches are not important. This information is available on the memory maps in Appendix A, for your reference.
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1-14 TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Chapter 2 Programming for Compatibility By following simple compatibility guidelines, you can write code that will run equally well on both the ’C80 and the ’C82. Object code written with these guidelines in mind should run on both de- vices without recompiling or relinking. In this chapter, you will find information that will help you: Select the best compatibility technique for your application.
’C80 and ’C82 without recompiling or relinking is not difficult. Writing code that runs on both the ’C80 and ’C82 is straightfor- ward because of the similarities in the two devices’ memory maps. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Obtaining Device-Specific Information 2.2 Obtaining Device-Specific Information Device-specific information can be obtained by your software. This information can help you effectively use all available PPs and properly initialize each PP’s stack pointer. 2.2.1 Determining the Device that is Executing your Software (MP) An MP-resident program can determine which device it is running on by reading the MP’s CONFIG register, which is shown in Figure 2–1.
; fix for ’C80 revs 1–3 a7 = comm & (1 \\ 8) ; is this a ’C80 or a ’C82? sp = [nz] sp | (1 \\ 11) ; if ’C82, modify initial SP TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Obtaining Device-Specific Information 2.2.4 Counting the Number of PPs Counting the number of PPs is essentially a process of checking which device is executing a program and then using that informa- tion to determine the number of PPs that are available on the pro- cessor.
PP3 on the ’C80, since the ’C82 doesn’t have these PPs. Do not use absolute addresses to access the PP stacks since the PP stacks have different locations in the ’C80 and ’C82. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Technique #1: Using Only Common RAM 2.3.4 Considerations When Using Technique #1 Although PP code that uses this technique should produce identi- cal results on the ’C80 and ’C82, the timing and performance of PP-resident programs may be affected by two main differences between the devices: Each ’C82 PP instruction cache is larger than each ’C80 PP instruction cache.
’C80 or ’C82. From this information, the MP should determine the loca- tion of the additional RAM and then pass pointers to this RAM to TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
The MP should pass a pointer to this RAM through a command buffer, such as the one shown in Figure 2–3 (taken from Sec- tion 5.2.6, Command Buffer , in the TMS320C80 Multitasking Executive User’s Guide ). The args field in the command buffer contains a pointer to a buffer in shared memory that contains the argument values for the command.
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2-10 TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Chapter 3 Prototyping ’C82 Code on the ’C80 The ’C80 can be used to prototype code that is targeted to run on the ’C82 alone. In this chapter, you will find information that will help you: Prototype ’C82 applications with a ’C80. Develop ’C82 code on a ’C80 development board.
’C80. In the actual target board, you would link your software using the linker command file for the ’C82. In this way, a ’C80 software development board (SDB) can be used to develop software for the ’C82. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Emulating the ’C82’s Data RAMs 3.2 Emulating the ’C82’s Data RAMs The PP data RAMs are relatively simple to emulate since the ’C80 has four 4-KB blocks of contiguous memory in the form of data RAMs 0 and 1 for each of its four PPs. The level of emulation provided by this approach should be adequate for many applica- tions.
Access these RAMs through pointers to mask the memory ad- dress differences between the ’C80 and ’C82. This approach is viable as long as your application can tolerate the fact that the RAM modules used for the emulation are not con- tiguous. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Emulating the ’C82’s Parameter RAMs 3.3.2 Emulating the MP Parameter RAM The remaining issue is how to emulate the ’C82’s 4096-byte MP parameter RAM. The last half of the memory address block occu- pied by this RAM is unpopulated on the ’C80. The ’C80’s PP2 pa- rameter RAM can be mapped into this space and accessed via a pointer.
For a list of linker directives, see Section 13.4, Linker Command Files , in the TMS320C80 (MVP) Code Generation Tools User’s Guide . 3.4.1 PP-Relative Addressing One linker command file can be used for linking code so that it can be executed by all PPs in each device.
For more information about map files, see subsection 13.3.8, Create a map file (–m filename option) , in the TMS320C80 (MVP) Code Generation Tools User’s Guide . 3.4.3 Linking Your ’C82 Code for Prototyping on a ’C80 Example 3–1 is a sample PP C program that will be used to illus-...
.usect assembler directives. To allocate the vector A in assembly language, the proper directive would be as follows: .usect ”.a_sect”,1536 In this way, you can use the linker to specify where to place vari- ables in memory. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
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2.8, Pragma Directives in the TMS320C80 (MVP) Code Generation Tools User’s Guide . For more information about the .sect and .usect directives, see Section 9.10, Directives Refer- ence , in the TMS320C80 (MVP) Code Generation Tools User’s Guide . 3.4.3.2 The ’C80 Linker Command File Example 3–2 shows a linker command file for prototyping ’C82...
DRAM0 and .b_sect was placed at address 00002000h in DRAM1. To see a complete map file, see Section 14.5, The Example Link- er Map Files , in the TMS320C80 (MVP) Code Generation Tools User’s Guide . 3-10 TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Prototyping Code Using Linker Command Files Example 3–3.’C80 Map File Lines for Vector A and Vector B ***************************************************** MVP COFF Linker Version 1.10 ***************************************************** Tue Oct 3 10:00:06 1995 OUTPUT FILE NAME: <c80ex.out> ENTRY POINT SYMBOL: ”$c_int00” address: 020006b8 MEMORY CONFIGURATION name origin length...
Example 3–5 shows the lines from the map file that show where A and B were placed in memory. The entire file is not shown in that example; dots (..) are used to show sections that were deleted. 3-12 TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
DRAM0 and .b_sect was placed at address 00008000h in DRAM1. To see a complete map file, see Section 14.5, The Example Link- er Map Files , in the TMS320C80 (MVP) Code Generation Tools User’s Guide . Prototyping ’C82 Code on the ’C80...
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RAM that is global to a ’C80 PP, and use the local port when accessing RAM that is local to a ’C80 PP. 3-16 TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
Prototyping Code Using Linker Command Files Example 3–8.Sample PP C Program With an Assembly Language Function /******************************************************** * ex_asm.c This example C code calculates the dot product of vectors A and B. The code uses an assembly language function to calculate the dot product. The assembly language code has the filename c80ex.p.
; loops to DOT_PROD_LOOP. br = iprs ; return to calling function. dot_product = dot_product + prod ; calculate last sum. .uexit ; tell ppca that this is the end of ; this function. 3-18 TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
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Running Title—Attribute Reference Appendix A The ’C80 and ’C82 Memory Maps The TMS320C8x is a byte-addressable device with a single 4-GB memory space common to its processors. Each address refers to a specific byte in the address space. Addresses less than 02000000h are reserved for on-chip memory, and addresses from 02000000h to FFFFFFFFh are assigned to off-chip memory.
É É É É É É É É É É É É É É É É É É É É É É É É É É É É † Block sizes have been rounded to the nearest unit size. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
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The ’C80 and ’C82 Memory Maps Figure A–1. TMS320C80 Memory Map (Continued) Starting Ending Bank Address Address Size (hex) (hex) (bytes) Memory or Device 0101 0000 0101 07FF MP Parameter RAM É É É É É É É É É É É É É É...
É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É † Block sizes have been rounded to the nearest unit size. TMS320C80 to TMS320C82 Software Compatibility User’s Guide...
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The ’C80 and ’C82 Memory Maps Figure A–2. TMS320C82 Memory Map (Continued) Starting Ending Bank Address Address size (hex) (hex) (bytes) Memory or Device 0181 8000 0181 8FFF MP Instruction Cache É É É É É É É É É É É É É É 0181 9000 0181 FFFF Reserved...
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TMS320C80 to TMS320C82 Software Compatibility User’s Guide...