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Emulation Design Considerations
15.9.3 Using Emulation Pins
15-18
The EMU0/1 pins of TI devices are bidirectional, three-state output pins. When
in an inactive state, these pins are at high impedance. When the pins are
active, they function in one of the two following output modes:
Signal Event
The EMU0/1 pins can be configured via software to signal internal events.
In this mode, driving one of these pins low can cause devices to signal
such events. To enable this operation, the EMU0/1 pins function as open-
collector sources. External devices such as logic analyzers can also be
connected to the EMU0/1 signals in this manner. If such an external
source is used, it must also be connected via an open-collector source.
External Count
The EMU0/1 pins can be configured via software as totem-pole outputs
for driving an external counter. If the output of more than one device is
configured for totem-pole operation, then these devices can be damaged.
The emulation software detects and prevents this condition. However, the
emulation software has no control over external sources on the EMU0/1
signal. Therefore, all external sources must be inactive when any device
is in the external count mode.
TI devices can be configured by software to halt processing if their EMU0/1
pins are driven low. This feature, in combination with the use of the signal event
output mode, allows one TI device to halt all other TI devices on a given event
for system-level debugging.
If you route the EMU0/1 signals between boards, they require special handling
because these signals are more complex than normal emulation signals.
Figure 15–9 shows an example configuration that allows any processor in the
system to stop any other processor in the system. Do not tie the EMU0/1 pins
of more than 16 processors together in a single group without using buffers.
Buffers provide the crisp signals that are required during a RUNB (run bench-
mark) debugger command or when the external analysis counter feature is
used.
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