Texas Instruments TMS320C6201 Reference Manual page 277

Table 9–14. TMS320C6211/C6711 Byte Address to EA Mapping for 32-bit Interface
# of column
address bits
DRAM Cmd
8
9
10
Legend:
Bit is internally latched during an ACTV command.
Reserved for future use. Undefined.
Table 9–14 describes the addressing for a 32-bit wide 'C6211/C6711 SDRAM
interface. The address presented on the pins are shifted for 8-bit and 16-bit
interfaces.
E E
A A
[21:17] 16
A
14
RAS 24
CAS 24
RAS 25
CAS 25
RAS 26
CAS 26
S
E E E E
D
A A A A
A
15 14 13 11 10
10
A A A A A
13 12 11 10 9
23 22 21 20 19 18
23 22 21 20 19 18
24 23 22 21 20 19
24 23 22 21 20 10
25 24 23 22 21 20
25 24 23 22 11 10
External Memory Interface
SDRAM Interface
E E E E E E
A A A A A A
9 8 7 6 5
A A A A A A
8 7 6 5 4 3
17 16 15 14 13
9 8 7 6 5
18 17 16 15 14
9 8 7 6 5
19 18 17 16 15
9 8 7 6 5
E E E
A A A
4 3 2
A A A
2 1 0
12 11 10
4 3 2
13 12 11
4 3 2
14 13 12
4 3 2
9-33