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Triggering, Wake-Up, and Effects
14.2 Triggering, Wake-Up, and Effects
NextInst:
14-4
Power-down mode PD1 takes effect eight to nine clock cycles after the instruc-
tion that caused the power down (by setting the idle bits in the CSR). Use the
following code segment to enter power down:
B NextInst
NOP
MVC Breg, CSR
NOP
NOP
NOP
NOP
NOP5
INSTR2
The power-down modes and their wake-up methods are programmed by setting
bits 10-15 of the control status register (CSR PWRD field). PD2 and PD3 modes
can only be aborted by device reset, while PD1 mode can also be terminated by
an enabled interrupt, or any interrupt (enabled or not), as directed by bits 13 and
14 of the CSR. When writing to CSR, all bits of the PWRD field should be set at
the same time. Logic 0 should be used when writing to reserved fields (bit 15 of
CSR).
The wake-up from PD1 can be triggered by either an enabled interrupt, or any
interrupt (enabled or not). The first case is selected by writing a logic 1 to bit 13
of the Control Status Register (PWRD field), and the second case is selected by
writing a logic 1 into bit 14 of CSR. If PD1 mode is terminated by a non-enabled
interrupt, the program execution returns to the instruction following the NOP 9.
Wake-up by an enabled interrupt executes the corresponding interrupt service
fetch packet (ISFP) first, prior to returning to the instruction following the NOP 9.
CSR register GIE bit and IER register NMIE bit must also be set in order for the
ISFP to execute, otherwise execution returns to the previous point, rather than
servicing the interrupt.
;branch does not effect program flow, but
;
hides the move to the CSR in the delay
;
slots
;power-down mode is set by this instruction
;CPU notifies power-down logic to initiate
;
power down
;normal program exexution resumed here
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