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8.5.2.2 TMS320C6202 Slave on the Expansion Bus
The external host can access the different expansion bus host port registers
by driving the XCNTL signal as follows:
XCNTL = 0
Reads or writes the expansion bus data (XBD) register.
XCNTL = 1
Reads or writes the expansion bus internal slave address (XBISA)
register.
Every transaction initiated by the host on the expansion bus is a two step
process. First, the host has to set the XBISA register, and then transfer the data
to/from the address pointed by XBISA register. The data transfer can take
place with or without auto-incrementing the internal 'C6202 memory address
register (XBISA). Whether the XBISA gets autoincremented is determined by
the AINC bit-field of the XBISA register.
To read/write from the 'C6202 memory space, the host must follow the
following sequence:
1) The host writes the transfer source/destination address to the XBISA reg-
ister, and sets AINC accordingly (in bit one of the XBISA register).
2) The host reads/writes to/from the address specified by XBISA. Read or
write is dictated by the XW/R signal. The XBISA register is
auto-incremented or not depending on what is written to the AINC bit dur-
ing step 1.
3) If the transfer is a burst, dictated by the BLAST signal, data is continuously
read or written.
Expansion Bus Host Port Operation
Expansion Bus
8-35
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