Texas Instruments TMS320C6201 Reference Manual page 457

15.9.4 Performing Diagnostic Applications
Figure 15–13. TBC Emulation Connections for n JTAG Scan Paths
For systems that require built-in diagnostics, it is possible to connect the
emulation scan path directly to a TI ACT8990 test bus controller (TBC) instead
of the emulation header. The TBC is described in the Texas Instruments Ad-
vanced Logic and Bus Interface Logic Data Book (literature number
SCYD001). Figure 15–13 shows the scan path connections of n devices to the
TBC.
Clock
TBC
TCKI
TDO
TMS0
TMS1
TMS2/EVNT0
TMS3/EVNT1
TMS4/EVNT2
TMS5/EVNT3
TCKO
TDI0
TDI1
In the system design shown in Figure 1–13, the TBC emulation signals TCKI,
TDO, TMS0, TMS2/EVNT0, TMS3/EVNT1, TMS5/EVNT3, TCKO, and TDI0
are used, and TMS1, TMS4/EVNT2, and TDI1 are not connected. The target
devices' EMU0 and EMU1 signals are connected to V
tors and tied to the TBC's TMS2/EVNT0 and TMS3/EVNT1 pins, respectively.
The TBC's TCKI pin is connected to a clock generator. The TCK signal for the
main JTAG scan path is driven by the TBC's TCKO pin.
Emulation Design Considerations
V CC
TDI
TMS
EMU0
EMU1
TRST
TCK
TDO
TDI
TMS
EMU0
EMU1
TRST
TCK
TDO
Designing for JTAG Emulation
JTAG0
JTAGN
through pullup resis-
CC
15-23