Texas Instruments TMS320C6201 Reference Manual page 400

Tms320c6000 series peripherals
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SPI Protocol: CLKSTP
Figure 11–54. SPI Transfer with CLKSTP = 10b
CLKX (CLKXP=0)/SCK
CLKX (CLKXP=1)/SCK
D(R/X)/MOSI
(from master) †
D(R/X)/MISO
(from slave) §
FSX/SS
Figure 11–55. SPI Transfer with CLKSTP = 11b
CLKX (CLKXP=0)/SCK
CLKX (CLKXP=1)/SCK
D(R/X)/MOSI
(from master) †
D(R/X)/MISO
(from slave) §
FSX/SS
† If the McBSP is the SPI master (CLKXM = 1), MOSI=DX. If the McBSP is the SPI slave (CLKXM = 0), MOSI = DR.
§ If the McBSP is the SPI master (CLKXM = 1), MISO=DR. If the McBSP is the SPI slave (CLKXM = 0), MISO = DX.
11-82
B7
B6
B7
B6
B7
B6
B7
B6
The CLKSTP and CLKXP fields of the serial port control register (SPCR) select
the appropriate clock scheme for a particular SPI interface, as shown in
Table 11–21. The CLKSTP and CLKXP fields in the SPCR determine the fol-
lowing conditions:
Whether clock stop mode is enabled or not
In clock stop mode, whether the clock is high or low when stopped
In clock stop mode, whether the first clock edge occurs at the start of the
first data bit or at the middle of the first data bit
The CLKXP bit selects the edge on which data is transmitted (driven) and
received (sampled), as shown in Table 11–21.
B5
B4
B3
B5
B4
B3
B5
B4
B3
B5
B4
B3
B2
B1
B0
B2
B1
B0
B2
B1
B0
B2
B1
B0

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