Texas Instruments TMS320C6201 Reference Manual page 255

Table 9–3. EMIF Global Control Register Field Descriptions (Continued)
Field Description
SSCRT ‡
SBSRAM clock rate select
SSCRT = 0: SSCLK runs at 1/2x CPU clock rate
SSCRT = 1: SSCLK runs at 1x CPU clock rate
There is no SSCLK on the 'C6202. CLKOUT2 is fixed at half the
CPU clock.
SBSRAM runs at the EMIF clock rate (ECLKIN) on the
'C6211/C6711.
RBTR8 ‡
Requester arbitration mode
RBTR8 = 0: The requester controls the EMIF until a high-priority
request occurs.
RBTR8 = 1: The requester controls the EMIF for a minimum of eight
accesses.
‡ All arbitration is performed outside of the EMIF on
the 'C6211/C6711.
MAP ‡
Map mode, contains the value of the memory map mode of the device
MAP = 0: internal memory is used at address 0
MAP = 1: external memory used at address 0
‡ There is only one memory map available on the 'C6211/C6711.
† Field exists only in 'C6211/C6711
‡ Fields do not exist in 'C6211/C6711
§ Fields do not exist in 'C6202.
The 'C6202 EMIF registers are similar to those of the 'C6201. Due to the
combination of the SDRAM and SBSRAM signals, the user cannot include
both SDRAM and SBSRAM in the same system. The EMIF global control
register bitfields are modified slightly to reflect this change.
In order to support as many common programming practices as possible
between the 'C6201 and 'C6202, SSCEN and SDCEN are still used to enable
the memory interface clock, CLKOUT2. If SBSRAM is used in the system,
(specified with the MTYPE field in the CEn Control register) then SSCEN
enables and disables CLKOUT2. If SDRAM is used, then SDCEN enables and
disables CLKOUT2. This is possible since only one synchronous memory type
can exist in a given system.
The 'C6211/C6711 has similar EMIF registers to the 'C6201, with the excep-
tion that some of the bitfields of the global control register have been removed.
The 'C6211/C6711 EMIF global control register contains an additional field
BUSREQ.
External Memory Interface
EMIF Registers
9-11