Texas Instruments TMS320C6201 Reference Manual page 139

Tms320c6000 series peripherals
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6.6 EDMA Transfer Parameters
6.6.1
Options Parameter
Figure 6–8. Options Bit-Fields
31
29
28
27
PRI
ESIZE
2DS
RW, +0
RW, +0
RW, +0
Table 6–3. EDMA Channel Options Field Description
Depending on the parameter options associated with a transfer, the
source/destination address, element/array/frame count can be updated by the
EDMA. The following sections describe the various parameters shown in
Table 6–3.
The options parameter in the EDMA channel/event entry is a 32-bit field as
shown in Figure 6–8.
26
25
24
23
SUM
2DD
RW, +0
RW, +0
Field
Description
FS
Frame synchronization
FS=0; Frame sync is not needed to start a frame
transfer.
FS=1; Frame synchronization enabled. The relevant
event for a given EDMA channel is used to synchronize
a frame.
LINK
Linking events
LINK=0; Linking of event parameters disabled
LINK=1; Linking of event parameters enabled. Allows
reloading of event parameters from the parameter
RAM. Link address must be aligned on a 24-byte
boundary.
TCC
Transfer complete code
TCC=0000b to 1111b; 4-bit code is used to set the
relevant bit in CIPR (i.e. CIPR[TCC] bit) provided
TCINT=1.
22
21
20
19
DUM
TCINT
TCC
RW, +0
RW, +0
RW, +0
EDMA Transfer Parameters
16
15
2
1
rsvd
LINK
R,+0
RW,+0
Section
6.7
6.6.7 and
6.9
6.13
EDMA Controller
0
FS
RW,+0
6-13

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