Texas Instruments TMS320C6201 Reference Manual page 368

µ -LAW/A-LAW Companding Hardware Operation
m-LAW/A-LAW Companding Hardware Operation
11.4 µ-LAW/A-LAW Companding Hardware Operation
Figure 11–33. Companding Flow
RSR
DR
DX
11-50
Companding ( com pressing and ex panding ) hardware allows compression
and expansion of data in either µ-law or A-law format. The specification for
µ-law and A-law log PCM is part of the CCITT G.711 recommendation. The
companding standard employed in the United States and Japan is µ-law and
allows 14 bits of dynamic range. The European companding standard is A-law
and allows 13 bits of dynamic range. Any values outside these ranges are set
to the most positive or most negative value. Thus, for companding to work best
here, the data transferred to and from the McBSP via the CPU or the DMA con-
troller must be at least 16 bits wide.
The µ-law and A-law formats encode data into 8-bit code elements. Compan-
ded data is always 8-bits-wide, so the appropriate (R/X)WDLEN(1/2) must be
set to 0, indicating an 8-bit serial data stream. If companding is enabled and
either phase of the frame does not have an 8-bit element length, companding
continues as if the element length is eight bits.
When companding is used, transmit data is encoded according to the
specified companding law, and receive data is decoded to 2s-complement
format. Companding is enabled and the desired format is selected by
appropriately setting (R/X)COMPAND in the (R/X)CR, as indicated in Table 11–7.
Compression occurs during the process of copying data from DXR to XSR and
expansion occurs from RBR to DRR, as shown in Figure 11–33.
8
RBR Expand
8
XSR Compress
For transmit data to be compressed, it should be 16-bit, left-justified data, such
as LAW16 as shown in Figure 11–34. The value can be either 13 or 14 bits
wide, depending on the companding law. This 16-bit data is aligned in DXR,
as shown in Figure 11–35.
16 32
RJUST
16
DXR
From CPU/DMA
DRR
To CPU/DMA