Texas Instruments TMS320C6201 Reference Manual page 328

McBSP Interface Signals and Registers
Table 11–5. Serial Port Control Register (SPCR) Field Descriptions (Continued)
Name Function
CLKSTP Clock stop mode
CLKSTP = 0Xb: Clock stop mode disabled. Normal clocking enabled for non-SPI
Clock stop mode enabled for various SPI
CLKSTP = 10b and CLKXP = 0: Clock starts with rising edge without delay.
CLKSTP = 10b and CLKXP = 1: Clock starts with falling edge without delay.
CLKSTP = 11b and CLKXP = 0: Clock starts with rising edge with delay.
CLKSTP = 11b and CLKXP = 1: Clock starts with falling edge with delay.
DXENA DX Enabler – applicable only for the 'C6211/C6711 device. Enable extra delay
for DX turn-on time. This bit controls the Hi-Z enable on the DX pin, not the data
itself, so only the first bit of data is delayed.
DXENA = 0: DX enabler is off.
DXENA = 1: DX enabler is on.
11-10
mode.
modes when:
Section
11.7
11.6.4