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HPI Signal Descriptions
7.2.4
Byte Enables: HBE[1:0]
On HPID writes, the value of HBE[1:0] indicates which bytes of the 32-bit word
are written. The value of HBE[1:0] is not important on HPIA or HPIC accesses
or on HPID reads. On HPID writes, HBE0 enables the least significant byte in
the halfword and HBE1 enables the most significant byte in the halfword.
Table 7–4 lists the valid combinations of byte enables. For byte writes, only one
HBE in either of the halfword accesses can be enabled. For halfword data
writes, both the HBEs must be held active(low) in either (but not both) halfword
access. For word accesses, both HBEs must be held active (low) in both half-
word accesses. No other combinations are valid. The selection of byte enables
and the endianness of the CPU (selected via the LENDIAN pin) determine the
logical address implied by the access.
Host-Port Interface
7-9
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