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Resource Arbitration and Priority Configuration
5.9.2
Switching Channels
5-32
The arbitration between the DMA controller and the CPU is performed by the
resource for which they are contending. For more information, see resource-
specific documentation. Note that a channel's PRI field should be modified
only when that channel is paused or stopped.
A higher priority channel gains control of the DMA controller from a lower priority
channel once it has received the necessary read synchronization. In switching
channels, the current channel allows all data from requested reads to be com-
pleted. The DMA controller determines which higher priority channel gains control
of the DMA controller read operation. That channel then starts its read operation.
Simultaneously, write transfers from the previous channel are allowed to finish.
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