Texas Instruments TMS320C6201 Reference Manual page 434

Additional Power-Saving Modes for the TMS320C6202
Example 14–1. Assemble Code for Initializing
14-8
You must careful to not disable a portion of the device which is being used,
since the peripheral in question will not be operational. A clock-off mode can
be entered and exited depending on the needs of the application. For example,
if an application does not need the serial ports, the ports can be disabled and
then re-enabled when needed.
When re-enabling any of the PD bits, the CPU should wait at least 5 additional
clock cycles before attempting to access that peripheral. This delay can be ac-
complished with a NOP 5 after any write to a peripheral power down register,
as shown in Example 14–1.
MVK 0x019C0200, Dest_Ptr_Reg
MVKH 0x019C0200, Dest_Ptr_Reg
STW SrcReg, *Dest_Ptr_Reg
NOP 5
Peripheral Power-Down Register