Texas Instruments TMS320C6201 Reference Manual page 411

Timer Registers
12.2.2 Timer Period Register
Figure 12–3. Timer Period Register
31
12.2.3 Timer Counter Register
Figure 12–4. Timer Counter Register
31
12-6
The timer period register (Figure 12–3) contains the number of timer input
clock cycles to count. This number controls the frequency of TSTAT.
Timer Period
The timer counter register (Figure 12–4) increments when it is enabled to count.
It resets to 0 on the next CPU clock after the value in the timer period register
is reached.
Timer Counter
RW, +0
RW, +0
0
0