Texas Instruments TMS320C6201 Reference Manual page 423

13.3 Interrupt Selector Registers
Table 13–3. Interrupt Selector Registers
Byte
Name
Address
019C0000h Interrupt multiplexer high
019C0004h Interrupt multiplexer low
019C0008h External interrupt polarity
13.3.1 External Interrupt Polarity Register
Figure 13–2. External Interrupt Polarity Register
31
Table 13–3 shows the interrupt selector registers. The interrupt multiplexer
registers determine the mapping between the interrupt sources in Table 13–1
and the CPU interrupts 4 through 15 (INT4–INT15). The external interrupt
polarity register sets the polarity of external interrupts.
Description
Selects which interrupts drive CPU interrupts 10–15
(INT10–15)
Selects which interrupts drive CPU interrupts 4–9
(INT4–INT9)
Sets the polarity of the external interrupts
(EXT_INT4–EXT_INT7)
The external interrupt polarity register allows you to change the polarity of the
four external interrupts (EXT_INT4 to EXT_INT7). When XIP is its default value
of 0, a low-to-high transition on an interrupt source is recognized as an interrupt.
By setting the related XIP bit in this register to 1, you can invert the external inter-
rupt source and effectively have the CPU detect high-to-low transitions of the
external interrupt. Changing an XIP bit's value creates transitions on the related
CPU interrupt (INT4–INT15) that the external interrupt, EXT_INT, is selected to
drive. For example, if XIP4 is changed from 0 to 1 and EXT_INT4 is low, or if
XIP4 is changed from 1 to 0 and EXT_INT4 is high, the CPU interrupt that is
mapped to EXT_INT4 becomes set. The external interrupt polarity register only
affects interrupts to the CPU, and has no effect on DMA events.
4
Rsvd
R, +0
3 2
XIP7 XIP6
R, +0 RW, +0
Interrupt Selector and External Interrupts
Interrupt Selector Registers
Section
13.3.2
13.3.2
13.3.1
1 0
XIP5 XIP4
RW, +0 RW, +0
13-7