Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 898

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23.5.11
SCTLBA—Secondary Control Block base Address
Register (IDER—D22:F2)
Address Offset: 1C–1Fh
Default Value:
Bit
31:16
15:2
1
0
23.5.12
LBAR—Legacy Bus Master Base Address Register
(IDER—D22:F2)
Address Offset: 20–23h
Default Value:
Bit
31:16
15:4
3:1
0
23.5.13
SVID—Subsystem Vendor ID Register (IDER—D22:F2)
Address Offset: 2Ch
Default Value:
Bit
15:0
23.5.14
SID—Subsystem ID Register (IDER—D22:F2)
Address Offset: 2Eh
Default Value:
Bit
15:0
898
Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
00000001h1
Reserved
Base Address (BAR)—R/W. Base Address of the I/O space (4 consecutive I/O
locations).
Reserved
Resource Type Indicator (RTE)—RO. This bit indicates a request for I/O space.
00000001h
Reserved
Base Address (BA)—R/W. Base Address of the I/O space (16 consecutive I/O
locations).
Reserved
Resource Type Indicator (RTE)—RO. This bit indicates a request for I/O space.
2Dh
0000h
Subsystem Vendor ID (SSVID) — R/WO. Indicates the sub-system vendor
identifier. This field should be programmed by BIOS during boot-up. Once written, this
register becomes Read Only. This field can only be cleared by PLTRST#.
NOTE: Register must be written as a DWord write with SID register.
2Fh
8086h
Subsystem ID (SSID) — R/WO. Indicates the sub-system identifier. This field should
be programmed by BIOS during boot-up. Once written, this register becomes Read
Only. This field can only be cleared by PLTRST#.
NOTE: Register must be written as a DWord write with SVID register.
Attribute:
RO, R/W
Size:
32 bits
Description
Attribute:
RO, R/W
Size:
32 bits
Description
Attribute:
R/WO
Size:
16 bits
Description
Attribute:
R/WO
Size:
16 bits
Description
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