Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 396

Hide thumbs Also See for 6 SERIES CHIPSET - DATASHEET 01-2011:
Table of Contents

Advertisement

10.1.54
CIR11—Chipset Initialization Register 11
Offset Address: 3344–3347h
Default Value:
Bit
31:2
1:0
10.1.55
CIR33—Chipset Initialization Register 33
Offset Address: 3348–334Bh
Default Value:
Bit
31:8
7
6
5
4
3
2
1
0
10.1.56
CIR34—Chipset Initialization Register 34
Offset Address: 3350–3353h
Default Value:
Bit
31:8
7
6
5
4
3
2
1
0
396
00000000h
Reserved
CIR11 Field 1 — R/W. BIOS must program this field to 10b.
00000000h
Reserved
CIR33 Field 8 — R/W. BIOS may write to this bit field for PCIe port 8.
CIR33 Field 7 — R/W. BIOS may write to this bit field for PCIe port 7.
CIR33 Field 6 — R/W. BIOS may write to this bit field for PCIe port 6.
CIR33 Field 5 — R/W. BIOS may write to this bit field for PCIe port 5.
CIR33 Field 4 — R/W. BIOS may write to this bit field for PCIe port 4.
CIR33 Field 3 — R/W. BIOS may write to this bit field for PCIe port 3.
CIR33 Field 2 — R/W. BIOS may write to this bit field for PCIe port 2.
CIR33 Field 1 — R/W. BIOS may write to this bit field for PCIe port 1.
00000000h
Reserved
CIR34 Field 8 — R/W. BIOS may write to this bit field for PCIe port 8.
CIR34 Field 7 — R/W. BIOS may write to this bit field for PCIe port 7.
CIR34 Field 6 — R/W. BIOS may write to this bit field for PCIe port 6.
CIR34 Field 5 — R/W. BIOS may write to this bit field for PCIe port 5.
CIR34 Field 4 — R/W. BIOS may write to this bit field for PCIe port 4.
CIR34 Field 3 — R/W. BIOS may write to this bit field for PCIe port 3.
CIR34 Field 2 — R/W. BIOS may write to this bit field for PCIe port 2.
CIR34 Field 1 — R/W. BIOS may write to this bit field for PCIe port 1.
Chipset Configuration Registers
Attribute:
R/W
Size:
32-bit
Description
Attribute:
R/W
Size:
32-bit
Description
Attribute:
R/W
Size:
32-bit
Description
Datasheet

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

6 series

Table of Contents